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# ggml-cuda: hip: add missing AMD GCN MMQ config - #27841
#27841
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[IMbackK](https://github.com/IMbackK) merged 1 commit into
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[thelittlefireman:feature\_GCN\_MMQ\_CONFIG](https://github.com/thelittlefireman/llama.cpp/tree/feature_GCN_MMQ_CONFIG)thelittlefireman/llama.cpp:feature\_GCN\_MMQ\_CONFIGCopy head branch name to clipboard
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## [ggml-cuda: hip: add missing AMD GCN MMQ config](https://github.com/ggml-org/llama.cpp/pull/27841#top)#27841 [IMbackK](https://github.com/IMbackK) merged 1 commit into [ggml-org:master](https://github.com/ggml-org/llama.cpp/tree/master)ggml-org/llama.cpp:masterfrom [thelittlefireman:feature\_GCN\_MMQ\_CONFIG](https://github.com/thelittlefireman/llama.cpp/tree/feature_GCN_MMQ_CONFIG)thelittlefireman/llama.cpp:feature\_GCN\_MMQ\_CONFIGCopy head branch name to clipboard
## Conversation
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### @thelittlefireman **[thelittlefireman](https://github.com/thelittlefireman)** commented [Aug 28, 2026](https://github.com/ggml-org/llama.cpp/pull/27841#issue-5273787780) • edited Loading Uh oh! There was an error while loading. [Please reload this page](https://github.com/ggml-org/llama.cpp/pull/27841).
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## Overview
Per-arch MMQ config for AMD GCN arch to properly handle wave64(nthreads 512 (8 warps)) to avoid the fallback to RDNA2 MMQ config (wave32/nthreads 256))
## Additional information
**Additional changes:**
- avoid unnecessary MMQ fallback for I < 128
- tile widths up to J=128 (rdna2 caps at 64) for performance with a safeguard J<=64 for MoE and -sm tensor.
They could be moved to another PR, for clarity.
Everything have been tested multiples times. My main goal was to be as good/fast as master branch for VGPR spill and kernel speeds.
**test-backend-ops:**
```
$.bin/test-backend-ops perf -b ROCm0 -o MUL_MAT -p "type_a=(q1_0|q2_0|q4_0|q4_1|q5_0|q5_1|q8_0|q2_K|q3_K|q4_K|q5_K|q6_K|iq1_s|iq2_xxs|iq2_xs|iq2_s|iq3_xxs|iq3_s|iq4_nl|iq4_xs|mxfp4|nvfp4),type_b=f32,m=(4096|4160|4097),n=(1|2|3|4|5|6|7|8|16|24|32|40|48|64|129|145|161|177|193|209|225|241|512),k=14336"
```
Curent master MAT\_MUL: <https://pastebin.com/raw/3nEP6FJJ>
PR MAT\_MUL: <https://pastebin.com/pL16aN4S>
| Quant | Average MMQ gain | `n=512` gain | Fallback `m=4097` | Adaptive `m=4160` |
| --- | --- | --- | --- | --- |
| Q1\_0 | +26.1% | +10.6% | +13.8% | +17.3% |
| Q2\_0 | +46.2% | +55.8% | +31.4% | +50.8% |
| Q4\_0 | +37.2% | +17.9% | +24.8% | +37.0% |
| Q4\_1 | +44.8% | +21.8% | +31.9% | +45.3% |
| Q5\_0 | +25.9% | +36.2% | +14.8% | +21.5% |
| Q5\_1 | +17.1% | +36.7% | +14.8% | +25.4% |
| Q8\_0 | +46.4% | +63.9% | +45.4% | +50.3% |
| Q2\_K | +395.4% | +336.0% | +382.6% | +460.7% |
| Q3\_K | +9.6% | +10.6% | +2.6% | −0.3% |
| Q4\_K | +5.7% | −0.5% | +11.2% | +15.8% |
| Q5\_K | +21.7% | +0.0% | +53.4% | +36.6% |
| Q6\_K | +34.5% | +51.5% | +38.8% | +29.7% |
| IQ1\_S | +20.9% | +43.5% | +20.0% | +31.1% |
| IQ2\_XXS | +16.0% | +26.9% | +13.4% | +20.4% |
| IQ2\_XS | +15.6% | +6.1% | +10.3% | +16.4% |
| IQ2\_S | +10.8% | +7.1% | +2.0% | +4.0% |
| IQ3\_XXS | +15.3% | +27.0% | +13.1% | +19.0% |
| IQ3\_S | +7.0% | +27.6% | +2.4% | +3.0% |
| IQ4\_NL | +31.8% | +33.2% | +16.7% | +23.8% |
| IQ4\_XS | +18.5% | +33.1% | +16.7% | +24.7% |
| MXFP4 | +26.6% | +32.1% | +15.9% | +23.4% |
| NVFP4 | +9.1% | +9.7% | +5.7% | +9.3% |
The Q3\_K `m=4160` (−0.3%) and Q4\_K `n=512` (−0.5%) differences are within measurement variance. No MMQ test shows a regression greater than 1%.
**Small benchmark:**
```
$ ./build-feature_GCN_MMQ_CONFIG/bin/llama-bench -m "/home/user/.cache/huggingface/hub/models--unsloth--Qwen3.6-27B-MTP-GGUF/snapshots/5cb35eb3dcbf52dbce5f87dbc64df6aaffadcace/Qwen3.6-27B-Q4_1.gguf" -ngl 999 -p 2048 -n 0 -r 1 --no-warmup
ggml_cuda_init: found 3 ROCm devices (Total VRAM: 98256 MiB):
Device 0: AMD Radeon Graphics, gfx906:sramecc+:xnack- (0x906), VMM: no, Wave Size: 64, VRAM: 32752 MiB
Device 1: AMD Radeon Graphics, gfx906:sramecc+:xnack- (0x906), VMM: no, Wave Size: 64, VRAM: 32752 MiB
Device 2: AMD Radeon Graphics, gfx906:sramecc+:xnack- (0x906), VMM: no, Wave Size: 64, VRAM: 32752 MiB
| model | size | params | backend | ngl | test | t/s |
| ------------------------------ | ---------: | ---------: | ---------- | --: | --------------: | -------------------: |
| qwen35 27B Q4_1 | 16.33 GiB | 27.32 B | ROCm | 999 | pp2048 | 297.89 ± 0.00 |
build: 17c0b05ee (10659)
$ ./build-master/bin/llama-bench -m "/home/user/.cache/huggingface/hub/models--unsloth--Qwen3.6-27B-MTP-GGUF/snapshots/5cb35eb3dcbf52dbce5f87dbc64df6aaffadcace/Qwen3.6-27B-Q4_1.gguf" -ngl 999 -p 2048 -n 0 -r 1 --no-warmup
ggml_cuda_init: found 3 ROCm devices (Total VRAM: 98256 MiB):
Device 0: AMD Radeon Graphics, gfx906:sramecc+:xnack- (0x906), VMM: no, Wave Size: 64, VRAM: 32752 MiB
Device 1: AMD Radeon Graphics, gfx906:sramecc+:xnack- (0x906), VMM: no, Wave Size: 64, VRAM: 32752 MiB
Device 2: AMD Radeon Graphics, gfx906:sramecc+:xnack- (0x906), VMM: no, Wave Size: 64, VRAM: 32752 MiB
| model | size | params | backend | ngl | test | t/s |
| ------------------------------ | ---------: | ---------: | ---------- | --: | --------------: | -------------------: |
| qwen35 27B Q4_1 | 16.33 GiB | 27.32 B | ROCm | 999 | pp2048 | 283.47 ± 0.00 |
build: d74a75570 (10643)
```
[#23881](https://github.com/ggml-org/llama.cpp/discussions/23881)
## Requirements
- I have read and agree with the [contributing guidelines](https://github.com/ggml-org/llama.cpp/blob/master/CONTRIBUTING.md)
- AI usage disclosure :
YES : For testing, small code generation and help to understand. Every changes have been manually edited and tested on gfx906.
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### **[IMbackK](https://github.com/IMbackK)** commented [Sep 2, 2026](https://github.com/ggml-org/llama.cpp/pull/27841#issuecomment-5512378460)
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| There seams to be code left over from perf testing in this pr. Please remove those changes. |
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### **[thelittlefireman](https://github.com/thelittlefireman)** commented [Sep 2, 2026](https://github.com/ggml-org/llama.cpp/pull/27841#issuecomment-5516608218)
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| There seams to be code left over from perf testing in this pr. Please remove those changes. I left them cause I think they are missing for proper testing. But i will remove them |
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