RV Embedded reports training a GPT from scratch in C on a RISC-V microcontroller without an FPU using 37KB of code, potentially providing a reproducible reference for model training on severely constrained hardware.
state: expiredheat: lowuncertainty: highnovelscott: lowembedded-ml tiny-models risc-vRV Embedded
What is this?
The case attributes to RV Embedded a report of training a GPT from scratch in C on a RISC-V microcontroller without a floating-point unit (FPU). The directly relevant web snippet is a first-person Reddit claim of GPT training with no FPU in “37KB of Memory,” whereas the case’s evidence titles say “37KB of code”; the supplied snippets do not resolve that distinction or independently establish the RV Embedded attribution. They also provide no model size, training results, runtime, or source-code availability, so reproducibility and practical usefulness remain unestablished.
Why it matters to Scott
No meaningful intersection found with Scott’s documented positions or builds: his hardware-aware local inference work concerns runtime policy, not microcontroller training, and scarce hardware memory does not establish a connection to his attention-budget framework. The radar tracks related tiny-model and plain-C training developments, but not this report; unresolved code-versus-memory accounting and absent training results or source availability leave no demonstrated reason to change what Scott builds or argues.
radar:trip-plain-c-transformer-stackradar:webgpu-direct-gguf-trainingradar:concept.tiny-modelsradar:concept.risc-vradar:concept.microcontrollers
queries asked of Scott's wikis
- on-device training versus inference constraints
- tiny language models resource-constrained hardware
- local AI compute memory economics
- minimal C model implementations reproducible training
- embedded systems RISC-V projects
Measured heat
no measured readings yet — the hourly heat pass fills this in
How the heat travelled
no chain yet — the hourly chain pass fills this in
Evidence (2) — ⭐ canonical anchor
Interpretation history
2026-09-10T15:56:09Z
The 48-hour review brings no substantive follow-up, leaving this a title-level implementation claim rather than a reproducible constrained-training reference. With no source code, training results, resolved memory accounting or expected confirmation, the case has faded without being disproved.
2026-09-08T14:37:45Z
No substantive new evidence has arrived: the linked title and its reconstructed echo remain one reporting line, not independent corroboration. The implementation is still a constrained-training curiosity rather than a reproducible engineering reference, with code-versus-memory accounting, training results, runtime and source availability unresolved.
2026-09-08T14:33:30Z
grounded: novel/low — No meaningful intersection found with Scott’s documented positions or builds: his hardware-aware local inference work concerns runtime policy, not microcontroll
2026-09-08T14:31:19Z
case created — The report offers a specific constrained-training implementation claim, without establishing model usefulness, training speed, or total memory requirements.
Decision trace
- 09-11 01:56expireThe 48-hour review brings no substantive follow-up, leaving this a title-level implementation claim rather than a reproducible constrained-training reference. With no source code, training results, re
- 09-11 01:56alert_silentThere is no new consequential delta or demonstrated implication for Scott's work. The echo repeats the same reporting line, and no confirming event is expected within six hours; an interruption w
- 09-11 01:56alert_routeThere is no new consequential delta or demonstrated implication for Scott's work. The echo repeats the same reporting line, and no confirming event is expected within six hours; an interruption w
- 09-09 00:37repriceNo substantive new evidence has arrived: the linked title and its reconstructed echo remain one reporting line, not independent corroboration. The implementation is still a constrained-training curios
- 09-09 00:37alert_silentThere is no new consequential delta or demonstrated implication for Scott's builds. Title-level testimony without implementation details or results can wait for a briefing; there is also no named
- 09-09 00:37alert_routeThere is no new consequential delta or demonstrated implication for Scott's builds. Title-level testimony without implementation details or results can wait for a briefing; there is also no named
- 09-09 00:36alert_silentThe supplied evidence identifies an RV Embedded report of GPT training in C on a no-FPU RISC-V microcontroller, but provides only its title. The 37KB figure describes code, not total training memory;
- 09-09 00:36alert_routeThe supplied evidence identifies an RV Embedded report of GPT training in C on a no-FPU RISC-V microcontroller, but provides only its title. The 37KB figure describes code, not total training memory;
- 09-09 00:33groundNo meaningful intersection found with Scott’s documented positions or builds: his hardware-aware local inference work concerns runtime policy, not microcontroller training, and scarce hardware memory
- 09-09 00:31createThe report offers a specific constrained-training implementation claim, without establishing model usefulness, training speed, or total memory requirements.