Independent reproduction will determine whether AMD Strix Point integrated graphics can sustain roughly 20 tokens per second on Qwen3.6-35B-A3B using shared system memory, enabling practical local coding workloads.

state: expiredheat: lowuncertainty: highconvergesscott: mediumlocal-inference amd-igpu qwen inference-economicsjstormes AMD Qwen

What is this?

Qwen3.6-35B-A3B is an open model with 35B total parameters and roughly 3B active per token, positioned for coding and agentic workloads. A community measurement attributed to jstormes’s ThinkPad P14 repository claims about 449 tokens/s prefill and 23 tokens/s generation on AMD Strix Point integrated graphics, with `amd_iommu=off` reportedly producing a 23–26% improvement. The supplied web snippets establish the model and its coding use cases but do not independently reproduce the AMD iGPU result; AMD’s own snippet concerns discrete Instinct datacenter GPUs, while the search summary’s pessimistic conclusion is unsupported by a cited test.

Why it matters to Scott

The claimed laptop-iGPU throughput and material effect of `amd_iommu=off` converge with Scott’s hardware-aware local-inference practice: runtime and hardware policy can determine whether local coding inference reaches a usable operating point. If independently reproduced, it could affect his local-serving hardware and unit-economics choices, but the result remains unverified and his recorded substrate is currently CUDA-based.

dev:concept.hardware-aware-local-inferencedev:project.gamepcip:concept.ai-unit-economicsip:concept.operating-pointradar:llama-cpp-rocm-714-validationradar:concept.amd-inferenceradar:concept.local-inferenceradar:concept.inference-economicsradar:concept.coding-models

queries asked of Scott's wikis

shared-memory iGPU local inference economics
local coding model minimum usable tokens per second
MoE active parameters versus memory bandwidth
AMD ROCm and consumer iGPU inference
local AI hardware sovereignty and commodity laptops
reproducible inference benchmarks and tuning flags

Measured heat

no measured readings yet — the hourly heat pass fills this in

How the heat travelled

no chain yet — the hourly chain pass fills this in

Evidence (3) — ⭐ canonical anchor

source	object	author	score	comments
🟠 reddit	Qwen3.6-35B on a ThinkPad AMD iGPU: 449 t/s prefill, 23 t/s gen — plus the one boot flag that was worth 26% LocalLLaMA	jstormes	0	13
🟧 echo.github ⭐	The primary measurement record is jstormes's p14 repository. The cited commit says: “Confirmed: the 23% was amd_iommu=off” and reports match	jstormes	—	—
🟠 reddit	Why does t/s go down as offload more to egpu? LocalLLaMA	Pyrolistical	0	0

Interpretation history

2026-08-28T05:24:34Z
Repeated review windows produced no matched independent reproduction or additional technical record, leaving the result an isolated operator benchmark. The episode has faded without establishing a transferable AMD-iGPU operating point.
2026-08-26T04:32:39Z
No independent benchmark or new technical evidence arrived within the review window, so the case remains a credible but isolated measurement rather than evidence of a transferable AMD-iGPU operating point.
2026-08-24T03:30:15Z
A second user’s claim of roughly 20 t/s on a different AMD iGPU weakly supports a memory-bandwidth-limited operating point, but lacks configuration details and a measurement record. It is not a matched independent reproduction of the Strix Point result.
2026-08-23T03:23:03Z
The Strix Halo plus PCIe-attached eGPU report adds a clue that split-device placement and transfer overhead can reduce throughput, but it is neither comparable enough nor complete enough to reproduce the Strix Point iGPU claim. The case remains a credible single-operator benchmark awaiting an independent matched test.
2026-08-23T03:22:08Z
evidence attached: reddit.post.1vvuypl — The firsthand benchmark investigates how Strix Point and discrete-GPU memory placement affect Qwen3.6 local inference performance.
2026-08-22T21:34:10Z
No independent reproduction or new technical evidence has arrived; the lone additional comment does not change the single-operator status of the benchmark. Cool the case while retaining the public measurement record as a credible seed.
2026-08-22T21:30:22Z
grounded: converges/medium — The claimed laptop-iGPU throughput and material effect of `amd_iommu=off` converge with Scott’s hardware-aware local-inference practice: runtime and hardware po
2026-08-22T21:26:25Z
origin walked (codex/luna, conf 0.98): anchor reddit.post.1vvo7s9 -> echo.github.696a235211 by jstormes
2026-08-22T21:24:52Z
case created — The post reports a reproducible hardware configuration, public repository, and sustained measurements for a materially useful local-inference claim.

Decision trace

08-28 15:24expireRepeated review windows produced no matched independent reproduction or additional technical record, leaving the result an isolated operator benchmark. The episode has faded without establishing a tra
08-28 15:24alert_silentThe only delta is continued staleness with unchanged evidence and engagement; there is no new consequential fact to interrupt Scott with.
08-28 15:24alert_routeThe only delta is continued staleness with unchanged evidence and engagement; there is no new consequential fact to interrupt Scott with.
08-26 14:32repriceNo independent benchmark or new technical evidence arrived within the review window, so the case remains a credible but isolated measurement rather than evidence of a transferable AMD-iGPU operating p
08-26 14:32alert_silentThe only delta is elapsed time without corroboration; there is no new consequential fact for Scott, so routine review is preferable to an alert.
08-26 14:32alert_routeThe only delta is elapsed time without corroboration; there is no new consequential fact for Scott, so routine review is preferable to an alert.
08-24 13:30repriceA second user’s claim of roughly 20 t/s on a different AMD iGPU weakly supports a memory-bandwidth-limited operating point, but lacks configuration details and a measurement record. It is not a matche
08-24 13:30alert_silentThe refreshed discussion adds only an anecdotal result on different hardware, without reproducible benchmarks; it can wait for routine review.
08-24 13:30alert_routeThe refreshed discussion adds only an anecdotal result on different hardware, without reproducible benchmarks; it can wait for routine review.
08-23 13:23repriceThe Strix Halo plus PCIe-attached eGPU report adds a clue that split-device placement and transfer overhead can reduce throughput, but it is neither comparable enough nor complete enough to reproduce
08-23 13:23alert_silentThe new report concerns a different hardware topology and supplies no confirming benchmark for the claimed Strix Point operating point, so it can wait for routine review.
08-23 13:23alert_routeThe new report concerns a different hardware topology and supplies no confirming benchmark for the claimed Strix Point operating point, so it can wait for routine review.
08-23 13:22alert_silentThis is an incomplete, single-user troubleshooting report on a different Strix Halo plus PCIe-attached eGPU configuration. It neither reproduces the Strix Point iGPU result nor provides enough benchma
08-23 13:22alert_routeThis is an incomplete, single-user troubleshooting report on a different Strix Halo plus PCIe-attached eGPU configuration. It neither reproduces the Strix Point iGPU result nor provides enough benchma
08-23 13:22attachThe firsthand benchmark investigates how Strix Point and discrete-GPU memory placement affect Qwen3.6 local inference performance.
08-23 13:21propose_attachThe firsthand benchmark investigates how Strix Point and discrete-GPU memory placement affect Qwen3.6 local inference performance.
08-23 07:34repriceNo independent reproduction or new technical evidence has arrived; the lone additional comment does not change the single-operator status of the benchmark. Cool the case while retaining the public mea
08-23 07:34alert_silentThe new delta is only a minor engagement change with no supplied corroboration, implementation, or security analysis, so it can wait for the next briefing.
08-23 07:34alert_routeThe new delta is only a minor engagement change with no supplied corroboration, implementation, or security analysis, so it can wait for the next briefing.
08-23 07:30alert_silentThe public measurement record is substantive and suggests that a 96 GB Strix Point laptop can run a large MoE coding model usefully, with amd_iommu=off reportedly improving generation by 15–16%. Howev
08-23 07:30surface_candidateThe public measurement record is substantive and suggests that a 96 GB Strix Point laptop can run a large MoE coding model usefully, with amd_iommu=off reportedly improving generation by 15–16%. Howev
08-23 07:30alert_routeThe public measurement record is substantive and suggests that a 96 GB Strix Point laptop can run a large MoE coding model usefully, with amd_iommu=off reportedly improving generation by 15–16%. Howev
08-23 07:30groundThe claimed laptop-iGPU throughput and material effect of `amd_iommu=off` converge with Scott’s hardware-aware local-inference practice: runtime and hardware policy can determine whether local coding
08-23 07:26promote_anchororigin walk conf 0.98
08-23 07:24createThe post reports a reproducible hardware configuration, public repository, and sustained measurements for a materially useful local-inference claim.